All tests use Clk_A, Cmd_A and default settings for the control
register, cal_mask register and chnl_mask register unless noted
below.  The tests are all run at 10 MHz, with two exceptions:

• Test vector sets Atom44C_40MHz through Atom49C_40MHz were originally

supposed to be run at 40 MHz, so that we could set the MSB of the Tot
counter.  Ultimately, we determined that the vectors would not run
correctly on the tester at 40 Mhz.  They were finally run at 20 MHz (The
files should have been renamed, but we didn't do it).
 
• Vector Atom45D_20MHz was run at 20 MHz.

ANALOG test.

Atominit00, Atominit01, Atominit10 and Atominit
Initialization vectors. Issue a chip_reset, and set DRIVER_CTRL_0 and
DRIVER_CTRL_1 to 00, 01, 10,and 11 respectively.  Run at the beginning
of the vector sets so we can measure the DVDD current for each of the
output driver current settings.
 
 
 

FUNCTIONALITY test.

DACs test.

AtomDAC00N, AtomDAC01N, AtomDAC02N, ... AtomDAC63N
Sixty-four vector sets which loads the number in the filename into both
the CAL_DAC and the Threshhold_DAC; sets the chip in High Gain mode, and
Positive polarity; also does a read_status command to read-back the
downloaded values.  Used to set up the chips for voltage measurements of
CAL_IN and VTN for linearity checks.

AtomDACnnP:  nn =3D 0 thru 8, 16, 24, 32, 40, 48, and 56 thru 63
Twenty-two vector sets which loads the number in the filename into both
the CAL_DAC and the Threshhold_DAC; sets the chip in Low Gain mode, and
Negative polarity; also does a read_status command to read-back the
downloaded values.  Used to set up the chips for voltage measurements of
CAL_IN and VTN for linearity checks.

DIGITAL FUNC. test.

Atom1to6a
Test ability to read and write the control register, and chip
response to command addresses.  Exercises WRITE_CTRL_REG,
READ_STATUS and CHIP_RESET commands.  Test that CHIP RESET to
correct address works.  Test that chip responds to WRITE_CTRL_REG
to correct address and to broadcast; test that WRITE_CTRL_REG to
wrong address is ignored. Test that chip responds to READ_STATUS
to correct address, and that READ_STATUS to wrong address and
broadcast are ignored.  Some READ_STATUS commands tested with
read_right direction.

Atom1to6b, -c, -d, -e
Same as Atom1to6a, except use Chip_ID = 1, 2, 4, 8

Atom7to9a
Test ability to read and write the control register, and chip
response to command addresses. Exercises WRITE_CTRL_REG,
READ_STATUS and CHIP_RESET commands.  Writes alternating bits to
CTRL_REG (except for CT and SelB=0).  Test that chip responds to
CHIP_RESET to correct address and to broadcast; test that
CHIP_RESET to wrong address is ignored.

Atom7to9b, -c, -d, -e
Same as Atom7to9a, except use Chip_ID = 1, 2, 4, 8

Atom10to12
Test ability to read and write the mask registers, and chip
response to command addresses Exercises CHIP_RESET,
WRITE_MASK_REG and READ_STATUS commands.  Write various bit
patterns to Cal_mask and Chnl_mask.  Test that chip responds to
WRITE_MASK_REG to broadcast and correct address; test that
WRITE_MASK_REG to wrong address is ignored.

Atom13a
Test event readout, odd channels.  Exercises CHIP_RESET,  TRIGGER
and READ_EVENT.  Use Test_Pulse_Enable (TPE) and default
Digital_test_Pattern(DTP) to inject one event.  Expect to see 1
event with all ODD channels, with TOT = 5 and TS = 1.

Atom13b
Test event readout, even channels.    Exercises CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Use TPE and downloaded
DTP to inject one event.  Expect to see 1 event with all EVEN
channels, with TOT = 5 and TS = 1.

Atom13c
Same as Atom13b, except use Clk_B and Cmd_B only..  Tests ability
of chip to detect and work with Clk_B  Expect to see 1 event with
all EVEN channels, with TOT = 5 and TS = 1.

Atom14
Test event readout with read disabled.  Exercises CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Set
Respond_to_read_event=0.  Use TPE and default DTP to inject one
event.  Test that the chip ignores the READ_EVENT command.

Atom15
Test event readout, odd channels, reading out to right.
Exercises CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT.
This is the same as atom13a, except that r/o_direction is set to
1 (read right). .  Expect to see 1 event with all EVEN channels,
with TOT = 5 and TS = 1.

Atom16
Read blank events.  Exercises CHIP_RESET and READ_EVENT.  Try to
read out chip with no events loaded.  Expect to see no response
from chip.

Atom17
Test buffering.  Exercises CHIP_RESET, TRIGGER and READ_EVENT.
Use TPE and default DTP to inject four events.  Issue 5
READ_EVENT commands.  Expect to see 4 events with all ODD
channels, with TOT = 5 and TS = 1.

Atom18
Test Back End buffer control.  Test buffer control. Exercises
CHIP_RESET, TRIGGER and READ_EVENT. Use TPE and default DTP to
inject four events.  Issue 3 READ_EVENT commands; then inject 4
more events, and issue 5 READ_EVENT commands.  Expect to see 3
events with TOT=5 and TS=0; 1 event with TOT=5 and TS=1; 1 event
with TOT=1 and TS=14, 1 event with TOT=2 and TS=12, 1 event with
TOT=3 and TS=10; Should see no event data after the last read
command.

Atom19
Test the CLEAR_READOUT command.  Uses Chip_ID = 12.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject four events.  Read 2 events, clear
readout and read 2 events.  Expect 1 event with TOT=1 and TS=1.
then 1 event with TOT=5 and TS=2 followed by  no event data.

Atom19b
Test the CLEAR_READOUT command.  Uses Chip_ID = 13.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject four events.  Clear readout and
read 1 event.  Expect no event data.

Atom19c
Test the CLEAR_READOUT command.  Uses Chip_ID = 14.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject three events.  Clear readout and
read 1 event.  Expect no event data.

Atom19d
Test the CLEAR_READOUT command.  Uses Chip_ID = 12.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject four events.  Read 1 event, clear
readout and read 1 event.  Expect 1 event with TOT=1 and TS=1,
followed by no event data.

Atom19e
Test the CLEAR_READOUT command.  Uses Chip_ID = 12.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject three events.  Read 1 event, clear
readout and read 1 event.  Expect 1 event with TOT=4 and TS=1,
followed by no event data.

Atom19f
Test the CLEAR_READOUT command.  Uses Chip_ID = 12.  Uses
commands CHIP_RESET, TRIGGER, READ_EVENT and CLEAR_READOUT.  Use
TPE and default DTP to inject four events;  Clear readout; inject
four more events.  Read 5 events.  Expect 4 events with TOT=8,
TS=2; TOT=8, TS=4; TOT=8, TS=7; TOT=8, TS=11, followed by no
event data.

Atom20
TOT test, small gap. Uses Chip_ID = 14.  Uses commands
CHIP_RESET, TRIGGER and READ_EVENT.  Issue TPE(8), W(5), TPE(32),
W(TL-4), TRIGGER,.  Read 1 event, expect TOT=8, TS=0.

Atom21
TOT test, different TOT.  Uses Chip_ID = 13. Uses commands
CHIP_RESET, TRIGGER and READ_EVENT.  Issue TPE(48), W(TL-3*4),
TRIGGER,.  Read 1 event, expect TOT=12, TS=3.

Atom22
TOT test, different TOT.  Uses Chip_ID = 11. Uses commands
CHIP_RESET, TRIGGER and READ_EVENT.  Issue TPE(60), W(TL-6*4),
TRIGGER,.  Read 1 event, expect TOT=15, TS=6.

Atom23
TOT test, early trigger.  Uses Chip_ID = 12.  Uses commands
CHIP_RESET, TRIGGER and READ_EVENT.  Issue TPE(32), W(TL-23*4),
TRIGGER,.  Read 1 event, expect empty event.

Atom24
TOT test, late trigger.  Uses Chip_ID = 10. Uses commands
CHIP_RESET, TRIGGER and READ_EVENT.  Issue TPE(32), W(TL+2*4),
TRIGGER,.  Read 1 event, expect empty event.

Atom25
TOT test, trigger in readout.  Uses Chip_ID = 9.  Put in 1 event,
wait 2.2 usec, trigger, read_event, then trigger during first
readout and read_event again.  Expect 1 event with TOT=8, TS=1
and 1 event with TOT=13, TS=6.

Atom26a
TOT test, jitter = 10000.  Uses Chip_ID = 14.  Uses commands
CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT. Put in event,
trigger, read with 2us jitter.  Expect 1 event with TOT=8, TS=23.

Atom26b
TOT test, jitter = 00100 (0.5 usec).  Uses Chip_ID = 14.  Uses
commands CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT. Put
in event, trigger, put in 2nd event outside window, read 2
events. read with 2us jitter.  Expect 1 event with TOT=10, TS=6,
followed by an empty event.

Atom27
TOT test, jitter = 00000.  Uses Chip_ID = 14.  Uses commands
CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT. Put in event,
trigger, read with 2us jitter.  Expect no event data.

Atom28
TOT test, skip control=01. Uses Chip_ID = 14.  Uses commands
CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Put in 1
event, trigger, read 1 event.  Expect event with TOT=12, TS=0.

Atom29
TOT test, skip ctrl = 10. Uses Chip_ID = 14.  Uses commands
CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Put in 1
event, trigger, read 1 event.  Expect event with TOT=8, TS=0.

Atom30
TOT test, skip ctrl = 11. Uses Chip_ID = 14.  Uses commands
CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Put in 1
event, trigger, read 1 event.  Expect event with TOT=6, TS=0.

Atom31a
TOT test, sample = 00. Uses commands CHIP_RESET, WRITE_CTRL_REG,
TRIGGER and READ_EVENT.  Put in 1 event, trigger, read 1 event.
Expect event with TOT=12, TS=0.

Atom31b
TOT test, sample = 01. Uses commands CHIP_RESET, WRITE_CTRL_REG,
TRIGGER and READ_EVENT.  Put in 1 event, trigger, read 1 event.
Expect event with TOT=8, TS=0.

Atom32
TOT test, sample = 00 and skip = 01. Uses commands CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Put in 1 event, trigger,
read 1 event.  Expect event with TOT=6, TS=0.

Atom33
TOT test, sample = 10 and skip = 11. Uses commands CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT.  Put in 1 event, trigger,
read 1 event.  Expect event with TOT=1, TS=0.

Atom34
Test CLOCK_THRU mode. Uses commands CHIP_RESET, WRITE_CTRL_REG,
TRIGGER and READ_EVENT.  Put chip in Clock_Thru mode, check for
proper pattern on data lines.

Atom35
Test ability of chip to switch to CLK_B by command.  Uses
commands CHIP_RESET, WRITE_CTRL_REG, TRIGGER and READ_EVENT.
After reset, set SEL_B = 1. Put in 1 event, trigger, read 1
event.  Expect event with TOT=4, TS=0.

Atom36
Test SYNC command. Uses commands CHIP_RESET, WRITE_CTRL_REG,
TRIGGER, READ_EVENT and SYNC. Put in 1 event, trigger, read 1
event; issue SYNC cmd; Put in 1 event, trigger, read 1 event.
Expect 2 events with TOT=5, TS=0.

Atom37a
Test event readout with ALL channels.  Also test the individual ToT and
Time-Stamp bits. Exercises CHIP_RESET,  TRIGGER and READ_EVENT.  Use
Test_Pulse_Enable (TPE) and default Digital_test_Pattern(DTP) to inject
one event.  Expect to see 1 event with ALL channels, with TOT=0001(gray)
and TS =00001(gray).

Atom37b
Same as Atom37a, except expect TOT=0010(gray) and TS=00010(gray).

Atom37c
Same as Atom37a, except expect TOT=0100(gray) and TS=00100(gray).

Atom37d
Same as Atom37a, except expect TOT=1000(gray) and TS=01000(gray).

Atom37e
Same as Atom37a, except expect TOT=0010(gray) and TS=10001(gray).

Atom38
Test all no-op commands.  Uses all NO_OP commands.  Check for no
response from chip.

Atom39
Test pathological inputs. . Uses commands CHIP_RESET, TRIGGER and
READ_EVENT.
Put in two events, trigger twice w/short delay,  read twice.
Expect 1 event with TOT=6, TS=1.

Atom40
Test pathological inputs. . Uses commands CHIP_RESET, TRIGGER and
READ_EVENT.
Put in 1 events, trigger, issue READ_EVENT on CMD_B line.  Expect
no event.

Atom41
Test chip in "slave" mode.  Uses commands CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT. Set up chip with
RESP_TO_RD_EV=0, RO_DIR=0. Put in 1 event, trigger, read 1 event;
send READ_RIGHT_TOKEN_IN (RRTI); send READ_LEFT_TOKEN_IN (RLTI).
Test that chip does NOT respond to READ_EVENT command or RRTI.
Test that RLTI triggers an event  readout.  Expect 1 event with
TOT=5, TS=1.

Atom41a
Test chip in "slave" mode.  Uses commands CHIP_RESET,
WRITE_CTRL_REG, TRIGGER and READ_EVENT. Set up chip with
RESP_TO_RD_EV=0, RO_DIR=1. Put in 1 event, trigger, read 1 event;
send READ_LEFT_TOKEN_IN (RLTI); send READ_RIGHT_TOKEN_IN (RRTI).
Test that chip does NOT respond to READ_EVENT command or RLTI.
Test that RRTI triggers an event  readout.  Expect 1 event with
TOT=5, TS=1.

Atom42
Test ability to pass data through. Uses commands CHIP_RESET and
WRITE_CTRL_REG, TRIGGER.  After R/S, put in data on
READ_LEFT_DATA_IN; look for proper patterns on DATA_OUT AND
READ_LEFT_DATA_OUT.  Set chip to RO_DIR=1; put in data on
READ_RIGHT_DATA_IN; look for proper patterns on DATA_OUT AND
READ_RIGHT_DATA_OUT.

Atom43
Not used.
 

HF test

AtomDAC37hf
Same as AtomDAC37N, except chip-to-chip outputs in "don't care"
for high frequency tests.

Atom7to9hf
Same as Atom7to9b, except that all chip-to-chip outputs are in a
"don't care" state.  This vector set could be used to explore the
max frequency envelope.

Atom10to12hf
Same as Atom10to12, except that all chip-to-chip outputs are in a
"don?t care" state.  This vector set could be used to explore the
max frequency envelope.

Atom18hf
Same as Atom18, except that all chip-to-chip outputs are in a
"don?t care" state.  This vector set could be used to explore the
max frequency envelope. We were not able to get this test to work at
Honeywell, so it was removed from the final suite of test vector-sets.

Atom19fhf
"Max frequency" version of Atom19f.  All chip-to-chip outputs are
in a "don?t care" state. We were not able to get this test to work at
Honeywell, so it was removed from the final suite of test vector-sets.

Atom25hf
"Max frequency" version of Atom25.  All chip-to-chip outputs are
in a "don?t care" state. We were not able to get this test to work at
Honeywell, so it was removed from the final suite of test vector-sets.
 

CAL_INJ. test.

Note :Tests Atom44C_40MHz thru Atom48C_40MHz were intended to test the
analog front-ends for proper functioning by setting a relative low
threshold and pulsing each channel with a small injected charge, and
making sure that the channel read out.  However, these tests proved to
erratic, both on the Honeywell tester and on the test bench at LBL; the
problem appeared to be noise associated with the cal_inject pulse, which
sometimes caused channels to fire early and miss the readout window. The
final requirement for a chip was that it had to pass at least one of
these 5 tests.
Test Atom45D_20MHz was added with a larger threshold and a larger
injected pulse.  This test did not have a noise problem and each chip
was required to pass.

Atom44C_40MHz
Test preamps with small injected charge, low thrshhold.  Set up High
Gain, n-side; Shaping_Time=0 (100 ns), Cal_DAC=05, Threshold_DAC=30,
Set cal_msk AND Chnl_msk for chan 0, 4, 8,?; issue CALIB_STROBE and
TRIGGER; repeat with cal_msk and Chnl_msk set for chans (1,5, 9,?),
(2, 6, 10,?) and (3, 7, 11,?); read 4 events.  Expect 4 events with all channels
appearing in the proper places. All TOT bitsand all TS bits are
set to "don?t care" in the vector set.

Atom45C_40MHz
Test preamps.  Same as Atom44C-40MHz, except Shaping time=1 (200 ns).

Atom45D_20MHz
Test preamps with large injected charge and high threshhold. Set up High
Gain, n-side; Shaping_Time=1 (200 ns), Cal_DAC=32, Threshold_DAC=00,
Set cal_msk AND Chnl_msk for chan 0, 4, 8,?; issue CALIB_STROBE and
TRIGGER; repeat with cal_msk and Chnl_msk set for chans (1,5, 9,?),
(2, 6, 10,?) and (3, 7, 11,?); read 4 events.  Expect 4 events with all
channels appearing in the proper places. All TOT bitsand all TS bits are
set to "don?t care" in the vector set.

Atom46C_40MHz
Test preamps.  Same as Atom44C-40MHz, except Shaping time=2 (300 ns).

Atom47C_40MHz
Test preamps.  Same as Atom44C-40MHz, except Shaping time=3 (400 ns).

Atom48C_40MHz
Test preamps.  Same as Atom44C_40MHz, except set up for p-side
Set up High Gain, p-side, Shaping_Time=0 (100 ns),
Cal_DAC=58, Threshold_DAC=30.  Set cal_msk and Chnl_msk for
chan 0, 4, 8,?; issue CALIB_STROBE and TRIGGER; repeat with
cal_msk and Chnl_msk set for chans (1, 5, 9,?), (2, 6, 10,?) and
(3, 7, 11,?); read 4 events.  Expect 4 events with all channels appearing in
the proper places; each channel should have the MSB set in the
TOT field.  Other TOT bits and all TS bits are set to "don't care"
in the vector set.
 

CHNL_MASK test

Atom49C_40MHz
Test Chnl_Mask..  Set up High Gain, n-side, Shaping_Time=0 (100
ns), Cal_DAC=55, Threshold_DAC=0, Chnl_msk=all 0 s; set
cal_msk=all 1?s; issue CALIB_STROBE and TRIGGER; read 1 event.
Expect 1 empty event with NO channels reading out.
 

NOISE test

Atom50_40
Look for noisy channels. Set up High Gain, n-side, Shaping_Time=0
(100 ns), Threshold_DAC= 40(hex), Chnl_msk=all 1 s; issue TRIGGER;
read 1 event.  Expect 1 empty event with NO channels reading out.

 
TMIN test 

These are the  same as the HF tests but the clock duty cycle is chosen between
40,50, 60 and 70 %, then the clock frequency is increased from 10 MHz  until the
test fails. The value of the minimum clock period for which the test passed is
returned. All this is repeated for 3 different value of DVDD5: 4.8, 5.0 and 5.2 V.